Texas Instruments Jacinto 7 Training

Hands-On Learning

14 written high quality hands-on labs to get you up to speed on TI Processors.

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Training Description:

The training provides an understanding of the Jacinto 7 Multicore Processor Architecture from the Boot Process to the system in operation. You learn how to boot the multicore SoC and how to use Inter-Processor communication and synchronization mechanism. The training makes sure that attendees can benefit from their knowledge when working with integrated MCUs running RTOS or Baremetal as well as with Linux on ARM Cortex A72 Cores.

1. Jacinto 7 SoC Architecture

- Understand TI Jacinto7 Architecture
- Program TI-J7 Multicore
- Understand IPC and how Cores Communicate
- Understand Memory Architecture and Core Dependencies on J7
- Understand and Use TI CSL Libraries to write code and use J7 Peripherals
- Understand and Use Boot Sequence to boot own Code on J7

2. C7x DSP Code Optimization

- Understand and Learn how to optimize Code on C7x DSP
- Understand the DSP and MMA Architecture
- Understand Streaming Engine and Streaming Address Generator
- Understand C7x DSP Pipeline phases and Instruction Set Architecture
- Learn about Lookup Table and Histogram Algorithms

3. TI Deep Learning Training

- Understand TI Deep Learning Architecture
- TIDL/EdgeAI Tools Setup
- Compile and Execute Custom ONNX/TensorFlow Networks
- Implementation of Custom Operators
- TIDL Runtime and TI EdgeAI
- HW Acceleration on C7x DSP with OpenVX and OpenCL
- Understand 8-bit and 16-bit Quantization

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Jacinto 7 Training

Workshop Agenda

We will start with setting up the environment to compile code for both Embedded Linux OS running on Arm Cortex A72 and RTOS/Baremetal on integrated R5F MCUs or DSPs. Part 2 highlights the boot flow of the multicore SoC and how to create the necessary components from the bootloaders to the finished embedded Linux or RTOS programs.