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Hands-On Learning
14 written high quality hands-on labs to get you up to speed on TI Processors.
TIME & COST EFFECTIVE
Save time and reduce costs with competitive rates and efficient support.
CLEAN & HIGH QUALITY
Get optimized, stable, tested code that is easy to understand, maintain & reuse.
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Training Description:
The training provides an understanding of the Jacinto 7 Multicore Processor Architecture from the Boot Process to the system in operation. You learn how to boot the multicore SoC and how to use Inter-Processor communication and synchronization mechanism. The training makes sure that attendees can benefit from their knowledge when working with integrated MCUs running RTOS or Baremetal as well as with Linux on ARM Cortex A72 Cores.
1. Jacinto 7 SoC Architecture
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- Understand TI Jacinto7 Architecture
- Program TI-J7 Multicore
- Understand IPC and how Cores Communicate
- Understand Memory Architecture and Core Dependencies on J7
- Understand and Use TI CSL Libraries to write code and use J7 Peripherals
- Understand and Use Boot Sequence to boot own Code on J7
2. C7x DSP Code Optimization
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- Understand and Learn how to optimize Code on C7x DSP
- Understand the DSP and MMA Architecture
- Understand Streaming Engine and Streaming Address Generator
- Understand C7x DSP Pipeline phases and Instruction Set Architecture
- Learn about Lookup Table and Histogram Algorithms
3. TI Deep Learning Training
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- Understand TI Deep Learning Architecture
- TIDL/EdgeAI Tools Setup
- Compile and Execute Custom ONNX/TensorFlow Networks
- Implementation of Custom Operators
- TIDL Runtime and TI EdgeAI
- HW Acceleration on C7x DSP with OpenVX and OpenCL
- Understand 8-bit and 16-bit Quantization
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We have the development services
Your Business needs
We offer fast, affordable, high quality consulting and development services for any OS, any processor, any application. We offer broad experience in operating systems, processors, and protocols—as well as specific expertise in industrial automation, automotive, and IoT. Elco Solutions is your ISO-9001-certified consulting and development partner with 15+ years’ embedded experience and 40+ major contract completions. Find out how we can accelerate your development and meet your budget, schedule, and technical requirements.
Jacinto 7 Professional Training
Choose Your Workshop Agenda
Our hands-on Jacinto 7 workshops are designed for engineering teams developing advanced embedded systems using Texas Instruments Jacinto 7 processors. Select the training track that best matches your project requirements, from multicore architecture and Linux development to DSP acceleration, TIDL and OpenVX hardware acceleration.
01
Processor & SDK Overview
Introduction to Jacinto 7 multicore architecture including Arm Cortex-A72, R5F MCUs, DSP cores and hardware accelerators. Overview of Processor SDK, PDK structure and development workflow.
02
Development Environment & Tools
Installation and configuration of Linux SDK, RTOS SDK and CCS debugging tools. Hands-on labs for compiling SDK examples, Make-based builds and development setup under Linux and Windows.
03
Boot Flow & System Startup
Deep dive into Jacinto 7 boot architecture including ROM bootloader, SBL, U-Boot and multicore application startup. Learn how to boot Linux, RTOS and Baremetal applications together.
04
Inter-Processor Communication
IPC concepts using shared memory, RPMessage and mailbox communication. Practical labs demonstrating communication between Linux on A72 and RTOS applications running on R5F or DSP cores.
05
Memory Architecture
Understanding DDR memory layout, shared memory regions, DMA transfers, cache handling and multicore synchronization mechanisms for high-performance embedded applications.
06
SysFW & Device Manager
Learn the role of System Firmware in security, power management, peripheral ownership and resource allocation across multiple processing cores.
07
Custom Board Bring-Up
Practical guidelines for adapting Jacinto 7 SDK to custom hardware including pinmux configuration, PMIC setup, DDR initialization, clock tree configuration and Linux device tree modifications.
08
Peripheral Drivers & CSL
Development of low-level peripheral drivers using CSL and PDK APIs. Labs include Timer, Mailbox and Hardware Spinlock examples under RTOS and Linux.
09
Safety & Security Features
Overview of Jacinto 7 safety architecture including hardware safety concepts, software safety mechanisms and system-level functional safety considerations.
10
Ethernet Switch & Networking
Understanding the integrated Ethernet switch architecture, Linux networking, CPSW configuration and practical switch setup examples.
11
Linux Kernel & Yocto
Linux kernel compilation, custom driver integration, Yocto build system usage, image customization and embedded Linux deployment workflow.
01
TIDL & AI Acceleration Overview
Introduction to TIDL runtime, AI acceleration architecture on Jacinto 7, DSP acceleration concepts and TDA4 AI processing pipeline overview.
02
DSP Optimization Fundamentals
Understanding memory optimization, software pipelining, intrinsics, vectorization techniques and optimized C++ development for C7x DSP cores.
03
TIDL Development Environment
Setup of TIDL SDK tools, compilation environment and runtime examples. Practical labs for deploying and validating AI models on Jacinto 7.
04
Custom Neural Networks
Importing custom ONNX/TensorFlow networks into TIDL, model compilation flow and execution of optimized inference pipelines.
05
Custom Operators
Deep dive into unsupported operators, custom layer integration, hybrid execution and extending TIDL functionality for advanced applications.
06
C7x + MMA Architecture
Understanding Matrix Multiply Accelerator (MMA), DSP execution model and hardware acceleration architecture for AI workloads.
07
C7x ISA & Optimization
Practical optimization examples using C7x ISA, MMALIB, compiler optimization and advanced DSP programming techniques.
08
SE/SA Deep Dive
Understanding Streaming Engine (SE) and Streaming Address Generator (SA) for highly optimized DSP algorithms and efficient data movement.
09
Algorithm Optimization Labs
Hands-on optimization labs including lookup tables, histogram processing and AI-oriented DSP acceleration examples.
01
Linux SDK & Architecture
Introduction to Jacinto 7 Linux SDK, multicore Linux architecture, RTOS coexistence and Processor SDK Linux structure.
02
Linux Development Environment
Installation of Linux SDK, development environment setup, debugging tools and Linux build workflow.
03
Boot Flow & Multicore Startup
Linux boot flow, device initialization, U-Boot configuration and booting Linux together with RTOS applications.
04
IPC Under Linux
RPMessage-based communication between Linux and RTOS cores, shared memory usage and multicore synchronization mechanisms.
05
Memory & Root Filesystem
Linux memory architecture, NFS boot configuration, BusyBox-based root filesystem creation and boot argument configuration.
06
Hardware Access from Linux
Accessing peripherals from Linux using kernel drivers, /dev and /sys interfaces, SPI, I2C, GPIO, PCIe and USB examples.
07
Multimedia Acceleration
H.264/H.265 encode and decode acceleration, V4L2 integration and GStreamer multimedia pipeline examples.
08
Systemd & Linux Modules
Linux init system, module loading, udev integration, startup automation and runtime driver management.
09
Yocto & Debugging
Building custom Linux distributions using Yocto, image customization, remote debugging with gdbserver and performance profiling.
01
OpenVX Overview
Introduction to OpenVX concepts, graph-based processing and Jacinto 7 OpenVX software architecture.
02
Hardware Mapping
Mapping OpenVX graphs to hardware accelerators including VPAC, C7x DSP and image processing accelerators.
03
Custom OpenVX Graphs
Building custom OpenVX processing pipelines for object detection, image processing and sensor data analysis applications.
04
TIDL Integration
Combining OpenVX with TIDL acceleration, AI inference execution and DSP offloading techniques.
05
Display Subsystem
Rendering and displaying processed video streams, integrating OpenVX pipelines with Jacinto display subsystem.
Reviews
Testimonials
What People and Clients Think About Us?
John Pocreva
Senior Engineer, Mannkind Corp.
Stephen Gibellini
Senior Engineer, CRS Power.
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